Computer systems generally include a number of peripheral devices coupled together on a bus. The peripheral devices perform a variety of data storage, computational, data manipulation, display, control and audio functions for the computer system. The peripheral devices are often bus masters--devices which are capable of initiating a read or a write transaction on the bus. The peripheral devices initiate and complete transactions on the bus as they efficiently perform their respective operations without unnecessarily burdening the CPU, other peripheral devices or other system resources.
Computer systems having a number of bus masters employ a bus arbiter to assign ownership or control of the bus when one or more bus masters attempt to access it. Bus arbiters generally include a number of request-input and grant-output pairs, each pair associated with a particular bus master. When a bus master needs to access the bus to perform an operation, it provides a bus request signal to the bus arbiter. When the bus arbiter determines that the requesting bus master may have access to the bus, the bus master provides a grant signal. When the bus master receives the bus grant signal, the bus master has access to the bus and performs the operation.
When two or more bus masters simultaneously request access to the bus, the bus arbiter determines which master should be granted access and which master should be denied access. The arbiter follows a fixed or rotational priority scheme when granting access to the bus. A fixed priority scheme assigns a priority order to each bus master and grants ownership of the bus in accordance with that priority order; a rotational priority scheme changes the priority order of each bus master over time in accordance with an algorithm, program or other method.
Prior art bus arbiters, whether fixed or rotational, employ a fairness scheme (lock control) which overrides the priority scheme and temporarily reassigns the priority order to prevent a locking error on the bus. A locking error may be a lockout, deadlock, livelock or other arbitration condition which causes errors or inefficiencies on the bus. Locking errors may even cause fatal system errors or hardware crashes.
Lockout errors can permanently prohibit a peripheral device from obtaining access to the bus. For example, a lower priority bus master may be locked out if two high priority bus masters on a peripheral component interconnect (PCI) bus attempt simultaneously to access the lower priority bus master when it is locked (being held for the exclusive use of an initiator of an access). To prevent such an error, the fairness scheme countermands the priority scheme and guarantees the lower priority bus master access to the bus.
Additionally, the fairness scheme is necessary to prevent locking errors such as deadlocks or livelocks. Deadlocks and livelocks occur when each of two bus masters must wait for a response from the other before an operation on the bus can be completed. Such a deadlock or livelock can be due to locked/exclusive bus transactions in combination with write back cache transactions. Also, deadlocks and livelocks may occur when an access is unable to be completed because other bus masters are utilizing necessary system resources.
The fairness scheme even overrides a fixed priority scheme to prevent locking errors. Therefore, prior art arbiters are not capable of guaranteeing a particular bus master access to the bus in a particular amount of time (a time-bound access) because the fairness scheme can override the access by the particular bus master. Thus, although the fairness scheme is necessary to prevent locking errors, the fairness scheme disadvantageously prevents the bus arbiter from providing an exclusive (highest priority), non-preemptive (non-interruptable) bus access.
Particular computer systems such as dockable computer systems and audio-capable computer systems are subject to decreased performance or even catastrophic failure if the systems do not respond immediately to an external situation (requirement or event). In these types of systems, a particular peripheral device must be given access to the bus for the system to respond to the external situation. Because the external situation often demands an immediate response, a bus arbiter is needed which provides an exclusive, non-preemptive access to the bus so the particular peripheral device may quickly respond to the external situation.
More particularly, an external event such as a docking event in a dockable computer system requires a peripheral device or CPU undertake protective measures to prevent signaling failures, bus crashes and component damage caused by physically connecting or disconnecting active buses of the system. The active buses of the dockable computer system may be advantageously protected by a docking agent, CPU, or other circuitry which quiets the active buses in response to the docking event. Exemplary docking agents, CPUs and other circuitry are discussed in U.S. Pat. application Ser. No. 08/217,951, filed Mar. 25, 1994, entitled "An Apparatus and Method for Achieving Hot Docking Capabilities for Dockable Computer."
Generally, the docking agent must receive ownership of the bus as soon as possible. Any time spent waiting for the bus arbiter to grant ownership is disadvantageous because the docking event may have to be delayed until ownership is granted. Further, prior art bus arbiters may preempt the control of the bus by the docking agent during the docking event thereby causing a catastrophic failure. Thus, there is a need for a dockable computer system which includes a bus arbiter optimized for responding to an impending docking event.
An external requirement such as the prevention of a "sound glitch" in an audio-capable computer system requires digital data representative of a sound wave to be procured within the stringent timing demands of digital sound production. Audio-capable computer systems generally employ a digital signal processing peripheral device to generate the digital data representative of the sound wave. If the peripheral device does not produce the digital data in the requisite time, the sound wave may contain an audibly noticeable "sound glitch" which affects the integrity of the sound wave and often annoys the user. Excess time spent waiting for the bus arbiter to grant ownership of the bus to the peripheral device delays the generation of the digital data, thereby causing the "sound glitch." Thus, there is a need for an audio-capable computer system including a bus arbiter optimized for preventing "sound glitches."
Thus, there is a need for a bus arbiter which is able to grant access to the bus in response to an external event or requirement. More particularly, there is a need for a bus arbiter which includes a dedicated request/grant pair which provides exclusive and non-preemptive access to the bus.